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SK Hynix Unveils Next-Gen CPO Roadmap: CPO to Extend to Memory Interfaces

August 20 news, according to Science and Technology Board Daily, on August 20, researchers from SK Hynix, the University of Virginia, and other institutions jointly published a paper…

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August 20 news, according to Science and Technology Board Daily, on August 20, researchers from SK Hynix, the University of Virginia, and other institutions jointly published a paper in the top scientific journal Nature Electronics, systematically outlining the development roadmap of co-packaged optics (CPO) technology in high-performance computing and AI. This marks the first time SK Hynix has publicly disclosed its technical blueprint for AI interconnect architecture in a journal of this level. The article proposes that while computing power doubles every two years, interconnect bandwidth only increases by 1.4 times, making the "bandwidth wall" a core bottleneck for AI scaling. CPO technology is listed as a key breakthrough, with the longer-term vision being to extend CPO to memory interfaces, allowing multiple AI accelerators to share the same memory pool and improving memory utilization efficiency.

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